CMOS circuit design, layout, and simulation (Record no. 32381)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00408nam a2200157 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20240918140736.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 240918b |||||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9781119481515 |
| 040 ## - CATALOGING SOURCE | |
| Transcribing agency | LIRC |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Edition number | 4th |
| Classification number | 621.397 BAK |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Baker, R. Jacob |
| 9 (RLIN) | 5477 |
| 245 ## - TITLE STATEMENT | |
| Title | CMOS circuit design, layout, and simulation |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | New Jersey |
| Name of publisher, distributor, etc. | Wiley |
| Date of publication, distribution, etc. | 2019 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 1235 p. |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | Dewey Decimal Classification |
| Koha item type | Reference |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Home library | Current library | Date acquired | Source of acquisition | Cost, normal purchase price | Total Checkouts | Full call number | Barcode | Date last seen | Copy number | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Dewey Decimal Classification | Library and Information Resource Centre | Library and Information Resource Centre | 2024-09-18 | Amazon | 12880.00 | 621.397 BAK | 9981 | 2024-09-18 | 1 | 2024-09-18 | Reference |